Microchip EMC2305 Manual de Usario

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2014-2021 Microchip Technology Inc. DS00001843B-page 1
INTRODUCTION
This application note provides specific guidelines for Printed Circuit Board (PCB) layout considerations and related sol-
der stencil considerations when implementing Microchip products in Quad Flat No-lead (QFN) and Dual Quad Flat No-
lead (DQFN) packages. This application note is intended for users who are familiar with PCB design, including signal
integrity and thermal management implementation concepts.
Successful implementation of QFN-style packages, including QFNs and DQFNs, requires special consideration for PCB
Footprint design, PCB layout, and solder paste stencil design. This application note describes these important consid-
erations.
The following guidelines are based on Microchip’s experience and knowledge, and may be accepted or rejected. Micro-
chip does not guarantee any design. The user is ultimately responsible for determining the suitability of their own design.
Microchip suggests that the user’s PCB fabricator and PCBA assembler confirm all implementations.
These guidelines for using QFN-style devices supersede prior guidance from Microchip. See AN2086 - Package
Application Note for Dual Row Quad Flat No-Leads (DQFN) for additional reference.
QFN-STYLE DEVICES
QFN-style packages (see Figure 1) are physically robust and thermally efficient, and they occupy much less PCB space
than equivalent QFP-style packages. They typically also have superior lead inductance characteristics. They do present
particular design constraints to improve production yield.
QFN-style packages generally have a single row (QFN) or two rows (DQFN) of perimeter pads around one or more
larger center pads (“flag” or “EPAD”), all encapsulated in a plastic body. These packages are surface-mounted to the
target system PCB by a solder reflow process.
FIGURE 1: QFN AND DQFN PACKAGES
AN18.15
PCB Design Guidelines for QFN and DQFN Packages
Author: Carl Johnson
Microchip Technology Inc.
AN18.15
DS00001843B-page 2 2014-2021 Microchip Technology Inc.
QFN Device Construction
Figure 2 illustrates the construction of QFN and DQFN devices. The die is attached to the EPAD with thermally conduc-
tive adhesive.
Bond wires are connected between the bond sites on the die to the bond sites on the lead frame. These lead frame sites
are available for the individual pin pads and for the EPADs.
The perimeter pads are typically used for signal assignment.
The EPAD is used for two things: as the primary thermal conduction path to remove package heat, and for device VSS
(GND). This is standard for Microchip QFN and DQFN packages.
Some Microchip devices, especially regulators, may have signals other than VSS on some EPADs. Carefully note this
from the data sheet and make proper connections accordingly.
FIGURE 2: QFN AND DQFN CONSTRUCTION
Critical Note: Many Microchip QFN devices use the EPAD as either the primary connection or the ONLY con-
nection to the devices VSS (GND) signal, as well as the primary thermal conduction path. Good
connection to the PCB’s VSS is crucial for proper device function.
2014-2021 Microchip Technology Inc. DS00001843B-page 3
AN18.15
QFN AND DQFN SOLUTIONS
Figure 3 illustrates the summary of Microchip’s guidance for using QFN-style packages.
FIGURE 3: MICROCHIP'S STANDARD QFN/DQFN DESIGN SOLUTION SET

Especificaciones del producto

Marca: Microchip
Categoría: No categorizado
Modelo: EMC2305

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