Texas Instruments NE5534P Manual de Usario

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COMP/BAL
COMP
OUT
BALANCE
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IN+
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NE5534
,
NE5534A
,
SA5534
,
SA5534A
SLOS070D – JULY 1979 – REVISED NOVEMBER 2014
NE5534x, SA5534x Low-Noise Operational Ampliers
1 Features 3 Description
The NE5534, NE5534A, SA5534, and SA5534A
1
Equivalent Input Noise Voltage devices are high-performance operational ampliers
3.5 nV/ Hz Typcombining excellent dc and ac characteristics. Some
Unity-Gain Bandwidth 10 MHz Typ of the features include very low noise, high output-
Common-Mode Rejection Ratio 100 dB Typ drive capability, high unity-gain and maximum-output-
swing bandwidths, low distortion, and high slew rate.
High DC Voltage Gain 100 V/mV Typ
Peak-to-Peak Output Voltage Swing 32 V Typ These operational ampliers are compensated
internally for a gain equal to or greater than three.
With VCC± = ±18 V and RL= 600
Optimization of the frequency response for various
High Slew Rate 13 V/ s Typμapplications can be obtained by use of an external
Wide Supply-Voltage Range ±3 V to ±20 V compensation capacitor between COMP and
Low Harmonic Distortion COMP/BAL. The devices feature input-protection
diodes, output short-circuit protection, and oset-
Oset Nulling Capability voltage nulling capability with use of the BALANCE
External Compensation Capability and COMP/BAL pins (see ).Figure 10
For the NE5534A and SA5534A devices, a maximum
2 Applications limit is specied for the equivalent input noise
Audio Preampliers voltage.
Servo Error Ampliers
Device Information
Medical Equipment
PART NUMBER PACKAGE (PIN) BODY SIZE (NOM)
Telephone Channel Ampliers
NE5534x SOIC (8) 4.90 mm × 3.91 mm
SOIC (8) 4.90 mm × 3.91 mm
SA5534x SO (8) 6.20 mm × 5.30 mm
4 Simplied Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
NE5534
,
NE5534A
,
SA5534
,
SA5534A
SLOS070D JULY 1979 REVISED NOVEMBER 2014
www.ti.com
Table of Contents
8.2 Functional Block Diagram ......................................... 9
1 Features .................................................................. 1
8.3 Feature Description................................................. 10
2 Applications ........................................................... 1
8.4 Device Functional Modes........................................ 10
3 Description ............................................................. 1
9 Application and Implementation ........................ 11
4 Simplied Schematic............................................. 1
9.1 General Application................................................. 11
5 Revision History..................................................... 29.2 Typical Application ................................................. 12
6 Pin Conguration and Functions ......................... 310 Power Supply Recommendations ..................... 14
7 Specications......................................................... 411 Layout................................................................... 15
7.1 Absolute Maximum Ratings ...................................... 411.1 Layout Guidelines ................................................. 15
7.2 Handling Ratings....................................................... 411.2 Layout Example .................................................... 15
7.3 Recommended Operating Conditions ....................... 412 Device and Documentation Support ................. 16
7.4 Thermal Information .................................................. 4
12.1 Related Links ........................................................ 16
7.5 Electrical Characteristics........................................... 5
12.2 Trademarks ........................................................... 16
7.6 Operating Characteristics.......................................... 6
12.3 Electrostatic Discharge Caution............................ 16
7.7 Typical Characteristics .............................................. 7
12.4 Glossary ................................................................ 16
8 Detailed Description .............................................. 913 Mechanical, Packaging, and Orderable
8.1 Overview ................................................................... 9Information ........................................................... 16
5 Revision History
Changes from Revision C (September 2004) to Revision D Page
• Added , table, table, section,Applications Device Information Handling Ratings Feature Description Device
Functional Modes Application and Implementation Power Supply Recommendations Layout, section, section,
section, section, and section. .....Device and Documentation Support Mechanical, Packaging, and Orderable Information 1
Deleted table. .......................................................................................................................................Ordering Information 1
2Submit Documentation Feedback Copyright © 1979–2014, Texas Instruments Incorporated
Product Folder Links: NE5534 NE5534A SA5534 SA5534A
1
2
3
4
8
7
6
5
BALANCE
IN−
IN+
VCC−
COMP/BAL
VCC+
OUT
COMP
NE5534, SA5534 . . . D (SOIC), P (PDIP),
OR PS (SOP) PACKAGE
NE5534A, SA5534A . . . D (SOIC) OR P (PDIP) PACKAGE
(TOP VIEW)
NE5534
,
NE5534A
,
SA5534
,
SA5534A
www.ti.com
SLOS070D – JULY 1979 – REVISED NOVEMBER 2014
6 Pin Conguration and Functions
Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
BALANCE 1 I External frequency compensation
COMP/BAL 8 I External oset voltage adjustment/External frequency compensation
COMP 5 O External oset voltage adjustment
IN+ 3 I Noninverting input
IN- 2 I Inverting Input
OUT 6 O Output
VCC+ 7 Positive Supply
VCC- 4 Negative Supply
Copyright © 1979–2014, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: NE5534 NE5534A SA5534 SA5534A

Especificaciones del producto

Marca: Texas Instruments
Categoría: No categorizado
Modelo: NE5534P

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